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IEC 60191-6-6:2001

Current

Current

The latest, up-to-date edition.

Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)

Available format(s)

Hardcopy , PDF 1 User , PDF 3 Users , PDF 5 Users , PDF 9 Users

Language(s)

English, English - French

Published date

22-03-2001

FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Definitions
  3.1 flanged type
  3.2 type of real chip size
  3.3 FLGA
  3.4 material designation
      3.4.1 plastic type (P-FLGA)
      3.4.2 ceramic type (C-FLGA)

IEC 60191-6-6:2001 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.

Committee
TC 47/SC 47D
DevelopmentNote
Also numbered as BS EN 60191-6-6. (09/2001) A Bilingual edition has been published. (01/2013) Stability Date: 2018. (09/2017)
DocumentType
Standard
Pages
12
PublisherName
International Electrotechnical Committee
Status
Current

IEC 60191-6-3:2000 Mechanical standardization of semiconductor devices - Part 6-3: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of quad flat packs (QFP)
IEC 60191-2X:1999 Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
IEC 60191-1:2007 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
IEC 60191-2R:1995 Sixteenth supplement
IEC 60191-2G:1978 Seventh supplement
IEC 60191-3C:1987 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - Third supplement
IEC 60191-2V:1998 Twentieth supplement
IEC 60191-2D:1971 Fourth supplement
IEC 60191-2L:1982 Eleventh supplement
IEC 60191-1B:1970 Mechanical standardization of semiconductor devices - Part 1: Preparation of drawings of semiconductor devices - Second supplement
IEC 60191-2F:1976 Sixth supplement
IEC 60191-2K:1981 Tenth supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-2Y:2000 Twenty-third supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-1A:1969 Mechanical standardization of semiconductor devices - Part 1: Preparation of drawings of semiconductor devices - First supplement
IEC 60191-1C:1974 Mechanical standardization of semiconductor devices - Part 1: Preparation of drawings of semiconductor devices - Third supplement
IEC 60191-2:2012 DB Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-2H:1978 Eigth supplement
IEC 60191-3B:1978 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - Second supplement
IEC 60191-2A:1967 First supplement to Publication 191-2 (1966)Mechanical standardization of semiconductor devices - Part 2: DimensionsPart 2: Dimensions
IEC 60191-2B:1969 Second supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-2W:1999 Twenty-first supplement
IEC 60191-2J:1980 Ninth supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-2S:1995 Seventeenth supplement
IEC 60191-3D:1988 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - Fourth supplement
IEC 60191-2C:1970 Third supplement
IEC 60191-2Q:1990 fifteenth complement
IEC 60191-3A:1976 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - First supplement
IEC 60191-2Z:2000 Twenty-fourth supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
IEC 60191-5:1997 Mechanical standardization of semiconductor devices - Part 5: Recommendations applying to integrated circuit packages using tape automated bonding (TAB)
IEC 60191-3F:1994 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - Sixth supplement
IEC 60191-2U:1997 Nineteenth supplement
IEC 60191-2N:1987 Thirteenth supplement - Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-3:1999 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits
IEC 60191-3E:1990 Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits - Fifth supplement
IEC 60191-2P:1988 Fourteenth supplement
IEC 60191-2M:1983 Twelfth supplement
IEC 60191-2E:1974 Fifth supplement
IEC 60191-2T:1996 Eighteenth supplement

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