Customer Support: 131 242

  • There are no items in your cart
We noticed you’re not on the correct regional site. Switch to our AMERICAS site for the best experience.
Dismiss alert

IEC 61691-4:2004

Withdrawn
Withdrawn

A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.

Behavioural languages - Part 4: Verilog® hardware description language
Available format(s)

Hardcopy , PDF 1 User , PDF 3 Users , PDF 5 Users , PDF 9 Users

Withdrawn date

31-12-2021

Language(s)

English

Published date

05-10-2004

FOREWORD
IEEE Introduction
1 Overview
2 Lexical conventions
3 Data types
4 Expressions
5 Scheduling semantics
6 Assignments
7 Gate and switch level modeling
8 User-defined primitives (UDPs)
9 Behavioral modeling
10 Tasks and functions
11 Disabling of named blocks and tasks
12 Hierarchical structures
13 Configuring the contents of a design
14 Specify blocks
15 Timing checks
16 Back annotation using the Standard Delay Format (SDF)
17 System tasks and functions
18 Value change dump (VCD) files
19 Compiler directives
20 PLI overview
21 PLI TF and ACC interface mechanism
22 Using ACC routines
23 ACC routine definitions
24 Using TF routines
25 TF routine definitions
26 Using VPI routines
27 VPI routine definitions
Annex A (normative) Formal syntax definition
Annex B (normative) List of keywords
Annex C (informative) System tasks and functions
Annex D (informative) Compiler directives
Annex E (normative) acc_user.h
Annex F (normative) veriuser.h
Annex G (normative) vpi_user.h
Annex H (informative) Bibliography
Annex I (informative) List of Participants

Contains the formal syntax and semantics of all Verilog HDL constructs; the formal syntax and semantics of Standard Delay Format (SDF) constructs; simulation system tasks and functions,such as text output display commands; compiler directives,such as text substitution macros and simulation time scaling; the Programming Language Interface (PLI) binding mechanism; the formal syntax and semantics of access routines,task/function routines,and Verilog procedural interface routines; informative usage examples; informative delay model for SDF; listings of header files for PLI This publication has the status of a double logo IEEE/IEC standard

DocumentType
Standard
Pages
855
PublisherName
International Electrotechnical Committee
Status
Withdrawn

Standards Relationship
BS IEC 61691-4:2004 Identical

IEC 61691-7:2009 Behavioural languages - Part 7: SystemC R Language Reference Manual
BS IEC 62265:2005 Advanced library format (ALF) describing integrated circuit (IC) technology, cells and blocks
IEC 62265:2005 Advanced Library Format (ALF) describing Integrated Circuit (IC) technology, cells and blocks

IEEE 754-2008 REDLINE IEEE Standard for Floating-Point Arithmetic

View more information
$1,041.19
Including GST where applicable

Access your standards online with a subscription

Features

  • Simple online access to standards, technical information and regulations.

  • Critical updates of standards and customisable alerts and notifications.

  • Multi-user online standards collection: secure, flexible and cost effective.

Need help?
Call us on 131 242, then click here to start a Screen Sharing session
so we can help right away! Learn more