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IEC 60191-5:1997

Current

Current

The latest, up-to-date edition.

Mechanical standardization of semiconductor devices - Part 5: Recommendations applying to integrated circuit packages using tape automated bonding (TAB)

Available format(s)

Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users

Language(s)

English - French

Published date

23-04-1997

FOREWORD
INTRODUCTION
1 Scope
2 Terms and definitions
3 Description of tape automated bonding (TAB)
4 Dimensional requirements
    4.1 Film format
    4.2 Alignment holes
    4.3 Body size
    4.4 Test pad patterns
    4.5 Outer lead patterns
    4.6 Maximum lead count
5 Variation codes
6 Requirements for inner and outer lead bonding (ILB and
    OLB)
Figures
Tables
Notes to figures and tables
Annexes
A Summary of recommended TAB package configurations
    (super format)
B Summary of recommended TAB package configurations
    (wide format)
C Outer lead numbering
D Test pad numbering

Gives recommendations applying to integrated circuits supplied in packages using tape automated bonding (TAB) as the principal component for structural and interconnection functions. Covers the requirements for tape with bonded integrated circuits (IC) as supplied by a manufacturer to a user.

Committee
TC 47/SC 47D
DevelopmentNote
Also numbered as BS 3934-5(1997) (07/2005) Stability Date: 2020. (09/2017)
DocumentType
Standard
Pages
71
PublisherName
International Electrotechnical Committee
Status
Current
Supersedes

Standards Relationship
NEN IEC 60191-5 : 1998 Identical

BS EN 60191-6-2:2002 Mechanical standardization of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages
IEC 61747-1:1998+AMD1:2003 CSV Liquid crystal and solid-state display devices - Part 1: Generic specification
IEC 60191-6-6:2001 Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)

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