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JEDEC JESD82-16A.01:2021

Current
Current

The latest, up-to-date edition.

DEFINITION OF THE SSTUA32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY TEST FOR DDR2 RDIMM APPLICATIONS
Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

01-10-2021

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32866 registered buffer with parity test for DDR2 RDIMM applications.

DocumentType
Standard
Pages
44
PublisherName
JEDEC Solid State Technology Association
Status
Current
Supersedes

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