JEDEC JESD82-19A.01:2021
Current
Current
The latest, up-to-date edition.
DEFINITION OF THE SSTUA32S865 AND SSTUA32D865 28-BIT 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
01-10-2021
Publisher
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32S865 and SSTUA32D865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications.
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