ARINC 573-7 : 1974

1.0 Introduction
1.1 Basic Principle
1.2 Functions and Modes of Operation
1.3 Reliability and Maintainability
1.4 Unit Descriptions
1.5 Interchangeability
1.6 Regulatory Approval
2.0 Standards Required to Effect Interchangeability
2.1 Form Factors, Connectors and Index Pin Coding
2.2 Input and Output Signal Characteristics
2.3 Standard Interwiring
2.4 Power Circuitry
2.5 Weights
2.6 Environmental Requirements
3.0 System Design
3.1 General
3.2 Data Sources
3.3 Data Multiplexing
3.4 Sequence Control
3.5 Data Rate
3.6 Input Circuit Protection
3.7 Peak Detect Signal Conditioning
3.8 System Accuracy
3.9 Failure Warning and Functional Test
4.0 Standard Signal Characteristics
4.1 Interface Standards
4.2 Analog Input Signals
4.3 Digital Inputs
4.4 Discrete Inputs (On-Off Signals)
4.5 Standard reference Signals
4.6 Summary of Digital Signals
5.0 Flight Data Acquisition Unit Design
5.1 FDAU Functions
5.2 FDAU Inputs
5.3 Output Formats
5.4 External FDAU Clock and Synchronization
5.5 Document Data Input
5.6 Self Test
5.7 Excitation Output Signals
6.0 Digital Flight Data Recorder Design
6.1 Recording Capacity
6.2 Self Test
6.3 Power Inputs
6.4 Protection
6.5 Data Input
7.0 Flight Data Entry Panel Design
7.1 Output Signals
7.2 Power Input
7.3 Failure Warning Indications
8.0 Accelerometer Design
8.1 Accelerometer Description
8.2 Excitation
8.3 Signal Outputs
8.4 Filtering (Output Frequency Response)
8.5 Weight
Attachments
Attachment 1 - Notes Applicable to Standard Interwiring
Attachment 2 - Standard Interwiring
Attachment 3-0 - 'System Status Circuitary'
Attachment 3-1 - Schematic of Standard Interwiring
Attachment 3-2 - System Block Diagram
Attachment 4 - Connector Pin Layouts
Attachment 5-1 - Pin Assignment DFDR
Attachment 5-2 - Accelerometer Pin Assignment
Attachment 5-3 - Data Entry Panel Pin Assignment
Attachment 5-4 - FDAU Pin and Sequence Code Assignment
Attachment 6-1 - ARINC 573 Flight Data Acquisition Unit
                   Form Factor
Attachment 6-2 - DFDR Form Factor Connector Locations
Attachment 6-3 - Accelerometer Form Factor
Attachment 6-4 - Data Entry Panel Form Factor
Attachment 7-1 - Summary of Nonprogrammable Inputs
Attachment 7-2 - Summary of Programmable Inputs
Attachment 7-2-1 - Notes Applicable to Programmable Inputs
Attachment 7-3 - Summary of Discrete Inputs
Attachment 7-4 - Pin Assignment for Programmable Parameters
Attachment 8-1 - Notes Applicable to AIDS Data Addresses
Attachment 8-2 - ARINC 573 AIDS Data Addresses
Attachment 8-3 - FAA Required Parameter and Frame Format
Attachment 9 - Typical Examples of DADS Data
Attachment 10-1 - Word Structure
Attachment 10-2 - Wave Shapes
Attachment 10-3 - Synchronization Timing Tolerances
Attachment 10-4 - DFDR Output And Low Speed Output
Attachment 10-5 - Auxiliary Output
Attachment 10-6 - FDEP And Digital Data
Attachment 10-7 - Clock/Frame Synchronization
Attachment 11 - Digital Interface Standards
Attachment 12 - Frequency Count
Attachment 13 - Typical Wiring for Potentiometers
Attachment 14 - Guidance for Input Isolation
Attachment 15 - ARINC 573 Digital Output Scaling
Appendix 1 - Growth into Additional AIDS
Appendix 2 - Expanded Parameter Flight Data
                   Recorder System Requirements
Appendix 3 - Index of FDAU Pin Assignments
Appendix X - Assumed Electronic Chronometer
                   System Digital Signal Standards
                   (Attachments 4-1-4-3)