Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments

Available format(s)

Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users

Language(s)

English

Published date

11-07-2007

Publisher

International Electrotechnical Committee

Provides an interface between digital test generation tools and test equipment. A test description language is defined that:(a) facilitates the transfer of digital test vector data from CAE to ATE environments;(b) specifies patten, format, and timing information sufficant to define the application of digital test vectors to a DUT;and (c) supports the volume of test vector data generated from structured tests.

DevelopmentNote	Also numbered as IEEE 1450.1. (11/2007) Stability Date: 2018. (12/2017)
DocumentType	Standard
Pages	123
PublisherName	International Electrotechnical Committee
Status	Current

Standards	Relationship
NEN IEC 62526 : 2007	Identical
BS IEC 62526:2007	Identical

IEEE 1364-2005	IEEE Standard for Verilog Hardware Description Language
IEEE 1500:2007	TESTABILITY METHOD FOR EMBEDDED CORE-BASED INTEGRATED CIRCUITS
IEEE 1450 : 2007	STANDARD TEST INTERFACE LANGUAGE (STIL) FOR DIGITAL TEST VECTOR DATA