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IEEE DRAFT 1241 : D1.1 2001

Superseded
Superseded

A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.

DRAFT STANDARD FOR TERMINOLOGY AND TEST METHODS FOR ANALOG-TO-DIGITAL CONVERTERS
Superseded date

07-06-2001

Published date

01-12-2013

1 Overview
      1.1 Scope and Purpose
      1.2 Analog-to-Digital Converter Background
      1.3 Guidance to the User
             1.3.1 Interfacing
             1.3.2 Test Conditions
             1.3.3 Test Equipment
             1.3.4 Test Selection
      1.4 Manufacturer-Supplied Information
             1.4.1 General Information
             1.4.2 Minimum Specifications
             1.4.3 Critical ADC parameters
2 References
3 Definitions and Symbols
      3.1 Definitions
      3.2 Symbols and Acronyms
4 Test Methods
      4.1 General
             4.1.1 Test Setup
             4.1.2 Taking a Record of Data
             4.1.3 Equivalent Time Sampling
             4.1.4 Fitting Sinewaves
             4.1.5 Discrete Fourier Transforms and
                      Windowing
             4.1.6 Locating Code Transitions
             4.1.7 Determining the Static Transfer Curve
      4.2 Analog Input
             4.2.1 Input Impedance
             4.2.2 Static input impedance vs. input signal
                      level
             4.2.3 Static Input Current
      4.3 Static Gain and Offset
             4.3.1 Static Gain and Offset (Independently
                      Based)
             4.3.2 Static Gain and Offset (Terminal-Based)
      4.4 Linearity
             4.4.1 Integral Nonlinearity
             4.4.2 Differential Nonlinearity & Missing
                      Codes
             4.4.3 Monotonicity
             4.4.4 Hysteresis
             4.4.5 Harmonic and spurious distortion
             4.4.6 Intermodulation distortion
      4.5 Noise (Total)
             4.5.1 Signal-to-Noise and Distortion Ratio
                      (SINAD)
             4.5.2 Effective Bits
             4.5.3 (Random) Noise Power Ratio
      4.6 Step Response Parameters
             4.6.1 Test Method for Acquiring an Estimate
                      of the Step Response
             4.6.2 Slew Rate Limit
             4.6.3 Settling Time Parameters
             4.6.4 Transition duration of step response
             4.6.5 Overshoot and precursors
      4.7 Frequency Response Parameters
             4.7.1 Bandwidth (BW)
             4.7.2 Gain Error (Gain Flatness)
             4.7.3 Frequency Response and Gain From Step
                      Response
      4.8 Differential Gain and Phase
             4.8.1 Method for Testing a General Purpose
                      ADC
             4.8.2 Method for Testing a Special Purpose
                      ADC
             4.8.3 Comments on Differential Phase and
                      Differential Gain Testing
      4.9 Aperture Effects
             4.9.1 Aperture Width
             4.9.2 Aperture Delay
             4.9.3 Aperture Uncertainty
      4.12 Out-of-range Recovery
             4.12.1 Test Method for Absolute Out-of-range
                      Recovery
             4.12.2 Test Method for Relative Out-of-range
                      Recovery
             4.12.3 Comments on Test Methods
      4.13 Word Error Rate
             4.13.1 Test Methods
      4.14 Differential Input Specifications
             4.14.1 Differential Input Impedance to Ground
             4.14.2 Common Mode Rejection Ratio (CMRR) and
                      Maximum Common Mode Signal Level
             4.14.3 Maximum Operating Common Mode Signal
             4.14.4 Common Mode Out-of-range Recovery Time
      4.15 Comments on Reference Signals
      4.16 Power Supply Parameters
             4.16.1 Power Dissipation
Annex A (Informative) Comment on Errors Associated with
                      Word-Error-Rate Measurement
Annex B (Informative) Testing An ADC Linearized with
                      Pseudorandom Dither
      B.1 - Characteristics of ADC Errors
Annex C (Informative) Bibliography

Gives a guide to the testing and evaluation of analog-to-digital converters (ADCs). It considers only those ADCs whose output values have discrete values at discrete times, i.e. they are quantized and sampled.

DocumentType
Draft
PublisherName
Institute of Electrical & Electronics Engineers
Status
Superseded

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