IEEE DRAFT C37.118 : D7.0 2005
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
03-22-2006
01-12-2013
1 Overview
1.1 Scope
1.2 Purpose
1.3 Need for this standard
2 References
3 Definitions
4 Synchrophasor measurement
4.1 Phasor definition
4.2 Synchrophasor definition
4.3 Measurement time tag for synhrophasors
4.4 System time synchronization
5 Synchrophasor measurement requirements and compliance verification
5.1 Synchrophasor estimation
5.1.1 Reporting rates
5.1.2 Reporting times
5.1.3 Example results
5.1.4 PMU response Time
5.2 Accuracy limits
5.3 Compliance verification
6 Synchrophasor message format
6.1 Message application
6.2 Message framework
6.2.1 Overall Message
6.2.2 Time quality
6.2.3 Leap second bit timing examples
6.3 Data frame
6.4 Configuration frame
6.5 Header frame
6.6 Command Frame
ANNEXES
Annex A Bibliography (informative)
Annex B Cyclic Redundancy Codes (informative)
Annex C Time tagging and transient response (informative)
Annex D Message examples (informative)
Annex E Sources of synchronization (informative)
Annex F Time and synchronization communication (informative)
Annex G Benchmark tests (informative)
Annex H TVE evaluation and PMU testing (informative)
Annex I Synchrophasor message mapping into communications (normative)
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