Specifies procedures to test and evaluate the durability of crystalline silicon photovoltaic (PV) modules to the effects of short-term high-voltage stress including potential-induced degradation (PID).

This part of IEC 62804 defines procedures to test and evaluate the durability of crystalline silicon photovoltaic (PV) modules to the effects of short-term high-voltage stress including potential-induced degradation (PID). Two test methods are defined that do not inherently produce equivalent results. They are given as screening tests—neither test includes all the factors existing in the natural environment that can affect the PID rate. The methods describe how to achieve a constant stress level.

The testing in this Technical Specification is designed for crystalline silicon PV modules with one or two glass surfaces, silicon cells having passivating dielectric layers, for degradation mechanisms involving mobile ions influencing the electric field over the silicon semiconductor, or electronically interacting with the silicon semiconductor itself. This Technical Specification is not intended for evaluating modules with thin-film technologies, tandem, or heterostructure devices.

This Technical Specification describes methods to measure the module design’s ability to withstand degradation from system voltage effects that manifest in the relatively short term. The testing in this Technical Specification does not purport to examine certain combined effects that may occur over longer periods of time in modules such as encapsulation failure, which could lead in turn to rapid moisture ingress and electrochemical corrosion. This Technical Specification does not incorporate illumination of the module that can affect the rate of degradation.

The test methods are designed to measure PID sensitivity and will give results according to the stress levels and the module grounding configuration inherent to the respective tests. Because stress method (a), testing in an environmental chamber, employs a non-condensing humidity level to serve as a conductive pathway to electrical ground, it frequently applies less stress toward the centre of the module face and the PID effect is concentrated toward the module edges as a result. Stress method (b), contacting the surfaces with a grounded conductive electrode, evaluates cell sensitivity and some effects of the component packaging materials such as glass and encapsulant resistivity, but does not differentiate the effects of some construction methods of mitigating PID, for example, the use of rear rail mounts, edge clips, and insulating frames.

The actual durability of modules to system voltage stress will depend on the environmental conditions under which they are operated. These tests are intended to assess PV module sensitivity to PID irrespective of actual stresses under operation in different climates and systems.