ESD TR5.4-04 : 2013
Current
Current
The latest, up-to-date edition.
Specifies transient latch-up (TLU) as a state in which a low-impedance path, resulting from a transient overstress that triggers a parasitic thyristor structure or bipolar structure or combinations of both, persists at least temporarily after removal or cessation of the triggering condition.
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