ANSI INCITS 376 : 2003

Foreword
Introduction
1 Scope
2 Normative references
   2.1 Normative references
   2.2 Approved references
   2.3 References under development
   2.4 Other references
3 Definitions, symbols, abbreviations, keywords, and conventions
   3.1 Definitions
   3.2 Symbols and abbreviations
   3.3 Keywords
   3.4 Editorial conventions
   3.5 Object and class diagram conventions
   3.6 State machine conventions
   3.7 Bit and byte ordering
   3.8 Notation for procedures and functions
4 General
   4.1 Architecture
   4.2 Names and identifiers
   4.3 State machines
   4.4 Resets
   4.5 I_T nexus loss
   4.6 Expander device model
5 Physical layer
   5.1 Physical layer overview
   5.2 Passive interconnect
   5.3 Transmitter and receiver electrical characteristics
   5.4 READY LED signal electrical characteristics
6 Phy layer
   6.1 Phy layer overview
   6.2 Encoding (8b10b)
   6.3 Character encoding and decoding
   6.4 Bit order
   6.5 Out of band (OOB) signals
   6.6 Phy reset sequences
   6.7 SP (phy layer) state machine
   6.8 SP_DWS (phy layer dword synchronization) state machine
   6.9 Spin-up
7 Link layer
   7.1 Link layer overview
   7.2 Primitives
   7.3 Clock skew management
   7.4 Idle physical links
   7.5 CRC
   7.6 Scrambling
   7.7 Bit order of CRC and scrambler
   7.8 Address frames
   7.9 Identification and hard reset sequence
   7.10 Power management
   7.11 SAS domain changes
   7.12 Connections
   7.13 Rate matching
   7.14 SL (link layer for SAS phys) state machines
   7.15 XL (link layer for expander phys) state machine
   7.16 SSP link layer
   7.17 STP link layer
   7.18 SMP link layer
8 Port layer
   8.1 Port layer overview
   8.2 PL (port layer) state machines
9 Transport layer
   9.1 Transport layer overview
   9.2 SSP transport layer
   9.3 STP transport layer
   9.4 SMP transport layer
10 Application layer
   10.1 Application layer overview
   10.2 SCSI application layer
   10.3 ATA application layer
   10.4 Management application layer
Annex A Compliant jitter test pattern (CJTPAT)
Annex B SAS to SAS phy reset sequence examples
Annex C CRC
      C.1 CRC generator and checker implementation examples
      C.2 CRC implementation in C
      C.3 CRC implementation with XORs
      C.4 CRC examples
Annex D SAS address hashing
      D.1 SAS address hashing overview
      D.2 Hash collision probability
      D.3 Hash generation
      D.4 Hash implementation in C
      D.5 Hash implementation with XORs
      D.6 Hash examples
Annex E Scrambling
      E.1 Scrambler implementation example
      E.2 Scrambler implementation in C
      E.3 Scrambler implementation with XORs
      E.4 Scrambler examples
Annex F ATA architectural notes
      F.1 STP differences from Serial ATA (SATA)
      F.2 STP differences from Serial ATA II
      F.3 Affiliation policies
Annex G Expander device handling of connections
      G.1 Expander device handling of connections overview
      G.2 Connection request - OPEN_ACCEPT
      G.3 Connection request - OPEN_REJECT by end device
      G.4 Connection request - OPEN_REJECT by expander device
      G.5 Connection request - arbitration lost
      G.6 Connection request - backoff and retry
      G.7 Connection request - backoff and reverse path
      G.8 Connection close - single step
      G.9 Connection close - simultaneous
      G.10 BREAK handling during path arbitration
      G.11 BREAK handling during connection
      G.12 STP connection - originated by STP initiator port
      G.13 STP connection - originated by STP target port in an
           STP/SATA bridge
      G.14 STP connection close - originated by STP initiator port
      G.15 STP connection close - originated by STP target port
           in an STP/SATA bridge
      G.16 Pathway blocked and pathway recovery example
Annex H Primitive encoding
Annex I Messages between state machines
      I.1 Messages between phy layer and other layers
      I.2 Messages between link layer, port layer, and management
          application layer for all protocols
      I.3 Messages between link layer, port layer, and transport
          layer for SSP
      I.4 Messages between link layer, port layer, and transport
          layer for SMP
      I.5 Messages from transport layer to application layer for SSP
      I.6 Messages from transport layer to application layer for SMP
Annex J Discover process example implementation
      J.1 Discover process example implementation overview
      J.2 Header file
      J.3 Source file
Annex K SAS icon