BS IEC 823:1990

Foreword
Preface
CHAPTER 0: SCOPE
CHAPTER 1: INTRODUCTION TO THE IEC 823 VMSBUS STANDARD
1.1 Serial bus objectives
1.1.1 IEC 823 VMSbus standard objectives
1.2 Serial bus interface system elements
1.3 Serial bus standard terminology
1.4 Standard organizations
1.5 Standard relationship of the serial bus and a
       parallel backplane bus
CHAPTER 2: SERIAL BUS OVERVIEW
2.1 Overview of the Physical Layer
2.1.1 Physical Layer modules and signals
2.1.2 Physical Layer signalling
2.2 Link Layer overview
2.2.1 Modules and interfaces
2.2.2 Module groups
2.2.3 Frame transmission protocol
2.3 Using the serial bus to transfer data
2.4 Using the serial bus to set and reset flags
2.5 Application of serial bus module groups
2.6 Serial bus addressing capabilities
CHAPTER 3: SERIAL BUS FRAMES AND SUBFRAMES
3.1 Basic frame types
3.2 The Header
3.3 The Frame Type subframe
3.4 The Data subframe
3.5 The Frame Status subframe
3.6 The Jam Detect subframe
3.7 Jam protocol
3.8 Jam on Reset
CHAPTER 4: THE PHYSICAL LAYER
4.1 CLOCK SOURCE module
4.1.1 Medium interface
4.1.2 Physical and Link Layer interface
4.1.3 Operation
4.2 BRIDGE module
4.2.1 Media interfaces
4.2.2 Physical and Link Layer interfaces
4.2.3 Operation
4.3 BUS ACCESS module
4.3.1 Medium interface
4.3.2 Physical Layer interface
4.3.3 Link Layer interface
4.3.4 Operation
4.4 Electrical specifications
4.4.1 Input characteristics for the Backplane Medium
4.4.2 Driving and loading for SERCLK
4.4.3 Driving and loading for SERDAT*
4.4.4 Input characteristics for the Extended Medium
4.4.5 Driving the Extended Medium
4.4.6 Loading on the Extended Medium
4.4.7 Stress/damage resistance for the Extended Medium
CHAPTER 5: LINK LAYER MODULES
5.1 State diagram notation
5.2 HEADER SENDER module
5.2.1 Physical Layer interface
5.2.2 Link Layer interface
5.2.3 Higher Layer interface
5.2.4 Initialization
5.2.5 Operation
5.3 HEADER RECEIVER module
5.3.1 Physical Layer interface
5.3.2 Link Layer interface
5.3.3 Higher Layer interface
5.3.4 Initialization
5.3.5 Programming the address
5.3.6 Operation
5.4 DATA SENDER module
5.4.1 Physical Layer interface
5.4.2 Link Layer interface
5.4.3 Higher Layer interface
5.4.4 Initialization
5.4.5 Programming the Data Port
5.4.6 Operation
5.5 DATA RECEIVER module
5.5.1 Physical Layer interface
5.5.2 Link Layer interface
5.5.3 Higher Layer interface
5.5.4 Initialization
5.5.5 Reading data from the Data Port
5.5.6 Operation
5.6 FRAME MONITOR module
5.6.1 Physical Layer interface
5.6.2 Link Layer interface
5.6.3 Higher Layer interface
5.6.4 Initialization
5.6.5 Operation
CHAPTER 6: LINK LAYER GROUPS AND PROTOCOL
6.1 Simple groups
6.1.1 Simple flag
6.1.2 Virtual Signal Controller
6.1.3 On-Demand Talker
6.1.4 Transaction Talker
6.1.5 On-Demand Listener
6.1.6 Transaction Listener
6.1.7 Multiaddress Flag
6.1.8 Multiaddress Talker
6.1.9 Multiaddress Listener
6.1.10 Variable Priority Controller
6.2 Compound groups
6.2.1 Writing Controller
6.2.2 Reading Controller
6.2.3 Virtual Bus Transceiver
6.2.4 Semaphore
6.2.5 Signature-Checking Semaphore
6.2.6 Token Passing Group
6.2.7 Handshaking Writing Controller
6.2.8 Handshaking Transaction Listener
6.2.9 Locking Transaction Listener
6.2.10 Locking Transaction Talker
CHAPTER 7: IEC 821 VMEBUS BACKPLANE MEDIUM
7.1 Additional electrical specifications
7.1.1 Terminating resistors
7.2 Mechanical specifications
7.3 Timing parameters
7.3.1 Testing of compliance
CHAPTER 8: EXTENDED MEDIUM
8.1 Additional electrical specifications
8.1.1 Termination networks
8.1.2 The BALANCE line
8.1.3 Cable parameters
8.1.4 Filtering and optocoupling
8.2 Mechanical specifications
8.2.1 Connectors and signal assignments
       8.2.1.1 9-pole D-sub connector
       8.2.1.2 10-pole flat cable connector and P2/J2
                connector
       8.2.1.3 Mixtures of all three connector types
8.2.2 Cable segment length
8.3 Extended Medium timing
8.3.1 Data rate versus length
8.3.2 Timing parameters
8.3.3 Terminology for Extended Medium signals
8.3.4 Testing of compliance
Figures
2-1 Serial bus system structure and layering
2-2 Layering and interfacing on a typical board
2-3 Single-subrack Backplane Medium configuration
2-4 Free-standing board on the Extended Medium
3-1 Basic frame types
4-1 CLOCK SOURCE module
4-2 Extended bus waveforms
4-3 Signals used by the BRIDGE module
4-4 Serial bus waveforms
4-5 Signals used by the BUS ACCESS module
4-6 Backplane Medium waveforms
4-7 Test load circuit for RULE 4.26 and RULE 4.27
4-8 Test load circuit for RULE 4.28 and RULE 4.29
5-1 HEADER SENDER with FRAME MONITOR
5-2 HEADER SENDER state diagram
5-3 Signals used by a HEADER RECEIVER
5-4 HEADER RECEIVER state diagram
5-5 DATA SENDER with HEADER RECEIVER
5-6 DATA SENDER state diagram
5-7 DATA RECEIVER with HEADER RECEIVER
5-8 DATA RECEIVER state diagram
5-9 FRAME MONITOR state diagram
6-1 Simple flag
6-2 Virtual Signal Controller
6-3 On-Demand Talker
6-4 Transaction Talker
6-5 On-Demand Listener
6-6 Transaction Listener
6-7 Multiaddress Flag
6-8 Multiaddress On-Demand Talker
6-9 Multiaddress Transaction Listener
6-10 Variable Priority Controller
6-11 Writing Controller
6-12 Reading Controller
6-13 Virtual Bus Transceiver
6-14 Semaphore
6-15 Signature-Checking Semaphore
6-16 Token Passing Group
6-17 Handshaking Writing Controller
6-18 Handshaking Transaction Listener
6-19 Locking Transaction Listerner
6-20 Locking Transaction Talker
7-1 Backplane Medium waveforms and timing
8-1 EXTCLK termination network
8-2 EXTDAT termination networks
8-3 Connection to the BALANCE line
8-4 Twist-and-flat cable for Extended Medium within
       a cabinet, showing all the possible connector
       combinations
8-5a Piggyback D-sub connector allows PCB removal while
       maintaining galvanic continuity of the Extended
       Medium
8-5b Double cable in single D-sub connector maintaining
       galvanic continuity
8-6 Using a PCB to link the Extended Medium outside
       and inside a cabinet
8-7 Waveforms and timing for the Extended Medium
8-8 Extended and Backplane Media timing
8-9 States of an Extended bus signal
Numerous tables