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IEEE 1014.1-1994

Withdrawn

Withdrawn

A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.

IEEE Standard for a Futurebus+(R)/VME64 Bridge

Withdrawn date

17-10-2023

Published date

11-05-1995

1 Overview
1.1 Scope
1.2 Purpose
2 References
3 Definitions
3.1 Special keywords
3.2 Bridge-specific definitions
3.3 Bus-specific definitions
3.4 CSR and ROM definitions
4 System model and architecture
4.1 Introduction
4.2 Single bridge model
4.3 Dual Bridge model
4.4 Bridge interconnect bus
4.5 Bridge transaction translator
4.6 Reference tables
5 Bridge control and status register (CSRs)
5.1 Introduction
5.2 CSRs
5.3 ROM window
5.4 CSR specifications
5.5 ROM specification
6 Data channel
6.1 Description
6.2 Specification
6.3 Data channel ROM specification
7 Event channel
7.1 Description
7.2 Specification
7.3 Event channel ROM specification
8 Dual port memory channel
8.1 Description
8.2 Specification
8.3 Dual port memory channel ROM specification
9 Byte swapping
9.1 Introduction
9.2 Specification

Defines the logical protocol layer for bridging between a Futurebus+ system and a VME64 system in a tightly coupled fashion. Transferring of both data and events is covered. The physical layer is not defined. Implementors are free to define and use the Bridge in the manner that best fits the application for optimum performance, functionality, and cost trade-offs. The Bridge provides for software transparency such that, at the application level, software is not aware of accesses that reach across a bridge into the modules of another bus.

Committee
Microprocessor Standards Committee
DocumentType
Standard
PublisherName
Institute of Electrical & Electronics Engineers
Status
Withdrawn
Supersedes

BS ISO/IEC 10857:1994 Information technology. Microprocessor systems. Futurebus+. Logical protocol specification
BS ISO/IEC 13213:1994 Information technology. Microprocessor systems. Control and Status Registers (CSR) Architecture for microcomputer buses

IEEE 896.2-1991 IEEE Standard Backplane Bus Specification for Multiprocessor Architectures: Futurebus+(R)
ISO/IEC 13213:1994 Information technology Microprocessor systems Control and Status Registers (CSR) Architecture for microcomputer buses
ISO/IEC 10857:1994 Information technology — Microprocessor systems — Futurebus+ — Logical protocol specification

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