ANSI INCITS 272 : 1996
Withdrawn
A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.
INFORMATION TECHNOLOGY - FIBRE CHANNEL - ARBITRATED LOOP (FC-AL)
Hardcopy , PDF
23-07-2013
English
01-01-2001
Foreword
Introduction
1 Scope
2 Normative references
3 Definitions and conventions
3.1 Definitions
3.2 Editorial conventions
3.3 Abbreviations and acronyms
4 Structure and concepts
4.1 Overview
4.2 General description
4.3 Access fairness algorithm
4.4 Relationship to ANSI X3.230, FC-PH
5 Addressing
5.1 Arbitrated Loop Physical Address (AL_PA)
5.2 Native Address Identifier
6 FC-AL Ordered Sets
7 FC-AL Primitive Signals and Sequences
7.1 Arbitrate Primitive Signals
7.2 Open Primitive Signals (OPNy)
7.3 Open Replicate Primitive Signals (OPNr)
7.4 Close Primitive Signal (CLS)
7.5 Mark Primitive Signal (MRKtx)
7.6 Loop Port Bypass/Enable Primitive Sequences
7.7 Loop Initialization Primitive Sequences (LIP)
8 L_Port operation
8.1 History variables
8.2 Timeouts
8.3 Operational characteristics
8.4 Loop Port State Machine (LPSM)
9 L_Port state transition tables
10 Loop Initialization procedure
10.1 Initialization summary
10.2 Initialization introduction
10.3 Node-initiated L_Port initialization
10.4 L_Port initialization
Annexes and Index
A ANSI X3.230, FC-PH Alternate BB_Credit Management
B Loop Port State Machine examples
B.1 Node initialization example
B.2 N_Port Login example
C Multiple Loop examples
C.1 Dual-Port Node
C.2 Shared FC-2 Dual-Loop Node
D Access unfairness
D.1 Improving Loop performance
D.2 Emptying ACK buffers
E Half-duplex operation
F BB_Credit and Available_BB_Credit management example
G Clock skew smoothing function
G.1 Smoothing function requirement
G.2 Smoothing function elasticity buffer
G.3 Smoothing function description
H Mark Synchronization examples
H.1 Clock synchronization
H.2 Disk spindle synchronization
I Bypass Circuit example and usage
I.1 Bypass Circuit
I.2 Using a Bypass Circuit
J Public L_Ports and Private NL_Ports on a Loop
K Assigned Loop Identifier
L Selective replicate for parallel query acceleration
L.1 Parallel query technology
L.2 Shared disk cluster
L.3 Parallel query example
Index
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