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BS EN 60191-3:2000

Current

Current

The latest, up-to-date edition.

Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of integrated circuits

Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

15-06-2000

1. General
2. Terminology and definitions
3. Cross-referencing of packages
4. Terminal identification - Numbering of terminals
5. Dimensions and reference letter symbols
6. Drawing layout
7. Dimensioning and tolerances
8. Inter-conversion of inch and millimetre dimensions, and
   rules for rounding-off
9. Definition of families
10.Examples of drawings
11.Design procedure for dimensions of integrated circuit
   packages
12.Rules for mounting integrated circuit packages into carriers
13.Bending of terminals of QUIL packages
14.Pin grid arrays
15.Rule for orientation of integrated circuit packages in
   handling and shipping carriers such as stick magazines and
   rails
Annex A (normative) Limits applicable for the dimensions of
        integrated circuit package outlines
Annex B (informative) Example drawings showing cross-
        referencing of packages, utilization of reference
        letter symbols, terminal identification and index area
Annex C (normative) Terminal identification and numbering of
        terminals of devices with terminals disposed in three
        or more rows in each orthogonal direction
Annex D (normative) Recommended dimensions of integrated
        circuit packages of form G family
Annex E (normative) General rules for the preparation of
        outline drawings of packages of form G intended for
        automated handling
Annex F (normative) General rules for the preparation of
        outline drawings of pin grid arrays
Annex G (normative) Rule for orientation of integrated circuit
        packages in handling and shipping carriers such as
        stick magazines and rails
Annex H (normative) Bottom view method for terminal No.1
        recognition
Annex K (normative) Gate burrs, mold flash and protrusions
Annex ZA (normative) Normative references to international
         publications with their corresponding European
         publications

Guidance on the preparation of drawings of integrated circuit outlines are given in this part of IEC 60191

Committee
EPL/47
DevelopmentNote
Supersedes BS 3934-3(1992). Also numbered as IEC 60191-3. (09/2005)
DocumentType
Standard
Pages
60
PublisherName
British Standards Institution
Status
Current
Supersedes

Standards Relationship
UNE-EN 60191-3:2001 Identical
SN EN 60191-3 : 1999 Identical
NBN EN 60191-3 : 2000 Identical
EN 60191-3:1999 Identical
I.S. EN 60191-3:2000 Identical
NF EN 60191-3 : 2000 Identical

IEC 60191-1:2007 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
ISO 2692:2014 Geometrical product specifications (GPS) Geometrical tolerancing Maximum material requirement (MMR), least material requirement (LMR) and reciprocity requirement (RPR)
IEC 60191-2:2012 DB Mechanical standardization of semiconductor devices - Part 2: Dimensions
IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages

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