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BS IEC 62530:2011

BS IEC 62530:2011

Superseded

Superseded

A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.

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superseded

A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.

SystemVerilog. Unified hardware design, specification, and verification language

Available format(s)

Hardcopy , PDF

Superseded date

19-08-2021

Language(s)

English

Published date

31-07-2011

Publisher

British Standards Institution

Part One: Design and Verification Constructs
1. Overview
2. Normative references
3. Design and verification building blocks
4. Scheduling semantics
5. Lexical conventions
6. Data types
7. Aggregate data types
8. Classes
9. Processes
10. Assignment statements
11. Operators and expressions
12. Procedural programming statements
13. Tasks and functions (subroutines)
14. Clocking blocks
15. Interprocess synchronization and communication
16. Assertions
17. Checkers
18. Constrained random value generation
19. Functional coverage
20. Utility system tasks and system functions
21. I/O system tasks and system functions
22. Compiler directives
Part Two: Hierarchy Constructs
23. Modules and hierarchy
24. Programs
25. Interfaces
26. Packages
27. Generate constructs
28. Gate-level and switch-level modeling
29. User defined primitives (UDPs)
30. Specify blocks
31. Timing checks
32. Backannotation using the standard delay format (SDF)
33. Configuring the contents of a design
34. Protected envelopes
Part Three: Application Programming Interfaces
35. Direct programming interface (DPI)
36. Programming language interface (PLI/VPI) overview
37. VPI object model diagrams
38. VPI routine definitions
39. Assertion API
40. Code coverage control and API
41. Data read API
Part Four: Annexes
Annex A (normative) - Formal syntax
Annex B (normative) - Keywords
Annex C (normative) - Deprecation
Annex D (informative) - Optional system tasks and system
        functions
Annex E (informative) - Optional compiler directives
Annex F (normative) - Formal semantics of concurrent
        assertions
Annex G (normative) - Std package
Annex H (normative) - DPI C layer
Annex I (normative) - svdpi.h
Annex J (normative) - Inclusion of foreign language code
Annex K (normative) - vpi_user.h
Annex L (normative) - vpi_compatibility.h
Annex M (normative) - sv_vpi_user.h
Annex N (normative) - Algorithm for probabilistic distribution
        functions
Annex O (informative) - Encryption/decryption flow
Annex P (informative) - Glossary
Annex Q (informative) - Mapping of IEEE Std 1364-2005 and
        IEEE Std 1800-clauses into IEEE Std 1800-2009
Annex R (informative) - Bibliography
Annex S (informative) - IEEE List of Participants

Gives the EDA, Semiconductor, and System Design communities with a solid and well-defined IEEE Unified Hardware Design, Specification and Verification standard language, while resolving errata and developing enhancements to the current IEEE 1800 SystemVerilog standard.

IEC 62530:2011(E) Provides a unified Hardware Design, Specification, and Verification language. IEEE Std 1364TM-2005 Verilog is a design language. Both standards were approved by the IEEE-SASB in November 2005. This standard creates new revisions of the IEEE 1364 Verilog and IEEE 1800 SystemVerilog standards, which include errata fixes and resolutions, enhancements, enhanced assertion language, merger of Verilog Language Reference Manual (LRM) and SystemVerilog 1800 LRM into a single LRM, integration with Verilog-AMS, and ensures interoperability with other languages such as SystemC and VHDL. This publication has the status of a double logo IEEE/IEC standard.

Committee
EPL/501
DocumentType
Standard
Pages
1292
PublisherName
British Standards Institution
Status
Superseded
SupersededBy
Supersedes

Standards Relationship
IEEE 1800-2012 Identical
IEC 62530:2011 Identical

IEEE 1800-2012 IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language
ANSI X9.52 : 1998 TRIPLE DATA ENCRYPTION ALGORITHM MODES OF OPERATION
IEEE 1364-2005 IEEE Standard for Verilog Hardware Description Language
FIPS PUB 197 : 2001 ADVANCED ENCRYPTION STANDARD (AES)
FIPS PUB 46 : 0002 DATA ENCRYPTION STANDARD (DES)
ISO/IEC 9899:2011 Information technology Programming languages C
ISO/IEC 10118-3:2004 Information technology Security techniques Hash-functions Part 3: Dedicated hash-functions
IEEE 754-2008 REDLINE IEEE Standard for Floating-Point Arithmetic
FIPS PUB 180 : 2002 SECURE HASH STANDARD
IEEE/Open Group 1003.1, 2013 Edition IEEE Standard for Information Technology—Portable Operating System Interface (POSIX(TM)) Base Specifications, Issue 7

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PDF - English
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