BS ISO/IEC 9318-2 : 90 AMD 8328

1 Scope
2 Normative references
3 Definitions and conventions
3.1 Definitions
3.2 Conventions
4 General description
4.1 Application environment
4.2 Logical Interface characteristics
4.2.1 Slave Control
4.2.2 Information transfer
4.2.3 Data transfers
4.2.4 Format Control
4.3 Responsibility
4.3.1 Master
4.3.2 Slave
5 Physical Interface Considerations
5.1 Information transfer
5.1.1 Octet Mode
5.1.2 Transfer Mode
5.1.3 Termination of transfers
5.1.4 Data streaming
5.2 Bus Octets
5.2.1 Unsupported Bus Octets
5.2.2 Bus Control Octet
5.2.3 Master Status Octet
5.2.4 Slave Status Octet
5.2.5 Request Interrupts Octet
5.2.6 Address Octet Response
5.2.7 Selective Reset Octet
5.2.8 Selection Octet
5.2.9 Request Transfer Settings Octet
5.2.10 Slave Transfer Settings Octet
5.2.11 Request Slave Interrupts Octet
5.2.12 Slave Interrupts Octet
5.3 ATTENTION IN signal
6 Slave Functions
6.1 Disk Format
6.1.1 Format 1 - Fixed Block Format
6.1.2 Format 2 - Variable Block Format
6.1.3 Format Control
6.2 Format Specification
6.2.1 Format initialization
6.2.2 Manufacturer's Format Specification
6.2.3 Fixed Block mode
6.2.4 Variable Block Mode
6.3 Slave conditions
6.4 Dual Port (optional)
6.4.1 Port Enable/Disable
6.4.2 Slave Accessibility mode
6.4.3 Notification of alternate port exception
        condition
6.4.4 Attention
6.5 Reset
6.5.1 External Reset
6.5.2 Internal Reset
6.6 Head Control
6.7 Rotational Position Sensing (RPS) (optional)
6.7.1 RPS Target Sector Address
6.7.2 RPS Interrupt
6.8 Slave ECC (optional)
6.9 Power Sequencing (optional)
7 Bus Controls
7.1 Command/Response Controls
7.1.1 Load Slave Function (01)
7.1.2 Load Format Specification (02)
7.1.3 Load Slave-Specific Information (03)
7.1.4 Load Cylinder Address (04)
7.1.5 Load Head Address (05)
7.1.6 Load RPS Target Sector Address (06)
7.1.7 Load Position (07)
7.1.8 Read Configuration (41)
7.1.9 Read Format Specification (42)
7.1.10 Read Slave Specific Information (43)
7.1.11 Read Status (44)
7.1.12 Read Correction Vectors (45) (optional)
7.1.13 Read Current Sector Address (46)
7.1.14 Read Current Position (47)
7.1.15 Read Extended Status (48)
7.2 Fixed Block Data Controls
7.2.1 Definitions and use
7.2.2 Sector Data Controls (optional)
7.2.3 Field Data Controls (optional)
7.2.4 Special data controls - Step Head (90)
7.3 Variable Block Data Controls (optional)
7.3.1 Variable block data control coding
7.3.2 Format Home Field (A0)
7.3.3 Format Header Field (A1)
7.3.4 Format Data Field (A2)
7.3.5 Format Data Field - Short Skip (A3)
7.3.6 Format Skip from Index (A4)
7.3.7 Format Skip (A5)
7.3.8 Write Home Field (A8)
7.3.9 Write Header Field (A9)
7.3.10 Write Data Field (AA)
7.3.11 Write Data Field - Short skip (AB)
7.3.12 Defect Skip (AC)
7.3.13 Read Home Field (E0)
7.3.14 Read Header Field (E1)
7.3.15 Read Data Field (E2)
7.3.16 Read Data Field - Short Skip (E3)
8 Status
8.1 Slave Status
8.1.1 Successful Information Transfer
8.1.2 Bus Parity Error
8.1.3 Odd Octet Transfer
8.1.4 Time-Dependent operation
8.1.5 Operation Ending Status
8.2 Status Response
8.2.1 Exception Status Octet (octet 0)
8.2.2 Unsolicited Exception Status (octet 1)
8.2.3 Bus Control Exception Status (octet 2)
8.2.4 Slave Exception Status (octet 3)
8.2.5 Slave Exception Status (octet 4)
8.2.6 Vendor unique status (octet 5 bits 7-0)
8.2.7 Vendor unique status (octet 6 bits 7-0)
8.2.8 Vendor unique status (octet 7 bits 7-0)
8.3 Extended Status Response
8.3.1 Interface Flag (octet 0)
8.3.2 Data Recovery Flags (octet 1)
8.3.3 Slave Control Flags (octet 2)
8.3.4 Slave Status (octet 3)
8.3.5 Slave Alarms (octet 4)
8.3.6 Vendor unique status (octet 5 bits 7-0)
8.3.7 Vendor unique status (octet 6 bits 7-0)
8.3.8 Vendor unique status (octet 7 bits 7-0)
Annexes
A Defect Map
A.1 Location
A.2 Contents
A.3 Formats
A.3.1 Defects
A.3.2 Maps
A.4 Map Protection
A.5 CRC
B Bibliography
B.1 Informative References
B.2 Equivalent ANSI Standards
C Storage of Format Specifications and Attributes
D RPS Optional Parameters
Figures
A.1 Assignment of bits in each double octet
D.1 RPS Pulse with extension Example
D.2 RPS Pulse with width and skew Example
D.3 RPS Pulse with skew Example
Table
1 Slave conditions