PD R217-020:2002
Withdrawn
A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.
Electronic system specification languages. VHDL modelling guidelines
Hardcopy , PDF
07-01-2005
English
03-13-2002
1 Introduction
1.1 Purpose and scope
1.2 Applicable documents
1.3 Reference documents
2 Requirements for all kinds of models
2.1 General
2.2 Names
2.3 Comments
2.4 Types
2.5 Files
2.6 Signals and ports
2.7 Assertions and reporting
2.8 Subprograms, processes, entities, architectures,
component declarations
2.9 Configurations
2.10 Packages
2.11 Design libraries
2.12 Constructs to be avoided
2.13 Verification
2.14 File organisation
3 Additional requirements
3.1 Models for component simulation
3.1.1 Names
3.1.2 Types
3.1.3 Model interface
3.2 Models for Board-level simulation
3.2.1 Names
3.2.2 Model interface
3.2.3 Handling of unknown values
3.2.4 Timing
3.2.5 Reporting
3.2.6 Verification
3.3 Models for system-level simulation
3.3.1 Model interface
3.3.2 Verification
3.4 Testbenches
3.4.1 Automated verification
Annex A: Abbreviations
Annex B: Compatibility between VHDL-87 and VHDL-93
Annex C: Calculation of VHDL line coverage
Annex D: VHDL code examples
Annex E: Selection of simulation condition
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