Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

Published date

15-10-2010

Publisher

European Committee for Standards - Electrical

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

Committee	CLC/SR 47D
DocumentType	Standard
PublisherName	European Committee for Standards - Electrical
Status	Current

Standards	Relationship
IEC 60191-6-20:2010	Identical
NF EN 60191-6-20 : 2011	Identical
NBN EN 60191-6-20 : 2010	Identical
NEN EN IEC 60191-6-20 : 2010	Identical
PN EN 60191-6-20 : 2011	Identical
UNE-EN 60191-6-20:2010	Identical
BS EN 60191-6-20:2010	Identical
CEI EN 60191-6-20 : 2011	Identical
DIN EN 60191-6-20:2011-03	Identical

EN IEC 60191-1:2018	Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
I.S. EN IEC 60191-1:2018	MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 1: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF DISCRETE DEVICES

IEC 60191-6:2009	Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
IEC 60191-4:2013	Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
EN 60191-6:2009	Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages